1. Field of the Invention
The present invention relates to a reference voltage generation circuit, more particularly, to a reference voltage generation circuit which can be suitably built in an integrated circuit formed by integrating metal insulation semiconduction (MIS) transistors, specifically metal oxide semiconductor (MOS) transistors, such as insulated-gate field-effect transistors.
2. Description of the Related Art
For example, a dynamic random access memory (DRAM) includes a voltage reduction circuit which reduces a reference voltage such as 5 [V] supplied from outside to 3 [V], and uses the reduced voltage as an internal power supply voltage. A reference voltage generation circuit is necessary for forming such a voltage reduction circuit.
Also, a reference voltage generation circuit is necessary when an analog integrated circuit, such as a D/A converter for converting a digital signal to an analog signal, or an A/D converter for converting an analog signal to a digital signal, is constructed.
Generally, it is preferable that a reference voltage is a constant voltage which does not depend on the temperature. In a MOS integrated circuit, however, an operation speed is proportional to a power supply voltage and is inversely proportional to the temperature. Accordingly, it is preferable that a reference voltage has positive temperature characteristics especially when the reference voltage is used in a voltage reduction circuit for generating an internal power supply voltage.
On the other hand, in an integrated circuit, an increase in production processes thereof leads to a resulting increase in cost, and thus a reference voltage generation circuit to be built in the integrated circuit must have a formation which does not increase the production processes.
However, a known reference voltage generation circuit needs to be produced using a so-called "triple-well process", while a typical MOS integrated circuit can be produced using a so-called "twin-well process". Namely, when such a reference voltage generation circuit is incorporated into a typical MOS integrated circuit, a problem occurs in that the entire production process is increased due to the difference of the number of wells, i.e., the difference of the number of processes, and thus the cost of production is similarly increased.
Also, another reference voltage generation circuit is known in which it is difficult to restrict a consumed current therein to a predetermined amount or less. In this case, it would be possible to reduce the consumed current by setting a resistance value of a circuit element which determines the consumed current, to a greater value.
However, such an approach to reduce the consumed current is not practical since a considerably large area in the MOS integrated circuit is necessary in order to form such a resistance element.
Furthermore, when an external power supply voltage fed to a reference voltage generation circuit fluctuates in level, a problem occurs in that the generated reference voltage extremely becomes unstable depending on the temperature characteristics thereof.
Note, the problems in the prior art will be explained later in detail in contrast with the preferred embodiments of the present invention.